Ask an EE to free associate around the term “timing solution” and the answer, more than likely, is going to be “the 555 timer IC.” And no wonder; invented more than 40 years, it is still being produced – in fact it is the largest selling IC ever – with slight variations, by a number of semiconductor manufacturers. The “555” is ubiquitous, found as a timing solution in everything from toys to spacecraft.
But the needs of modern end applications are imposing new demands on clocks and timing solutions. Most systems operate synchronously; voltage levels must rise or fall at a specified time or else the circuit will be out of sync and failures will occur. The “timing budget”– the tolerable deviation from specified before failure occurs — sets the ultimate limit on the maximum rate at which a system can operate.
In wireless communications systems, clock jitter — the deviations of clock edges from their ideal locations — and local oscillator (LO) phase noise need to be minimized to prevent degradation of the RF signal quality. Clock jitter is also a major bottleneck for maintaining signal integrity in high data rate networking and wired communication. In advanced driver assist systems (ADAS), high-performance phase locked loops (PLLs) can significantly enhance the range and accuracy of radar systems.
The fact is that the performance of a system at any level, on a chip, on a board, or across boards, is predicated on the coordination of clock signals among the components. In synchronous systems, timing really is everything.
In a new Texas Instruments brochure, everything is about timing: “Clock and Timing Solutions” presents a range of easy to use solutions, tailored to the needs of specific applications, and thus designed to accelerate time to market.